Co-packaged optics puts the optical engine in the same package as the switch or accelerator die, instead of at the far end of a copper trace and a pluggable module. Broadcom now has the first volume-production CPO solution in its Tomahawk 5-Bailly chipset, has announced a third generation at 200G per lane, and reported that Meta ran its CPO links for a million link hours in the lab without a connectivity failure.
Others are moving too. Marvell showed a custom XPU with integrated CPO supporting 200 Gbps electrical and optical interfaces, and startup Ayar Labs got its TeraPHY optical engines into Global Unichip’s design flow — a necessary step before anything reaches production.
The problem being solved is one every high-speed designer recognises at a smaller scale. Copper loses signal with distance and frequency, and the drivers and retimers that compensate burn real power. Shortening the electrical path to millimetres and switching to light removes both, while reaching distances a hundred times greater than cable.
It is not a solved technology. Packaging is genuinely hard — interposers, through-silicon vias, hybrid bonding — standards are immature, and manufacturing economics at scale are unresolved. Analysts put broad adoption somewhere between 2028 and 2030. For now this is hyperscale infrastructure, not something arriving on a general-purpose board.
Source: EDN