TSMC entered volume production on its N2 process in late 2025, offering roughly 15% more performance at the same power, or a substantial power reduction at the same speed. Reporting through 2026 has consistently described N2 capacity as effectively sold out for the year, with Apple, Nvidia, Qualcomm and AMD said to have taken large allocations.
The reason the crunch is sharper than at previous nodes is die size. AI accelerators consume far more wafer area per chip than a phone processor, so a given number of wafer starts yields far fewer sellable parts. Demand measured in chips translates into a much larger demand measured in silicon.
For everyone outside that group the effect is indirect but real. Leading-edge capacity absorbs investment, engineering attention and advanced packaging, which slows the migration of everything else down the stack. Mature nodes stay busy for longer, and the price advantage that usually arrives as a process ages takes longer to appear.
This is mostly a reason not to chase the leading edge. For industrial, instrumentation and most embedded products, a mature, well-characterised node with stable supply and predictable pricing remains the better engineering decision — and it always was, quite apart from what the AI market is doing.
Source: Design & Reuse