RISC-V International put annual shipments at approaching 2.5 billion cores, with billions of SoCs already deployed. The number matters less than where those cores now appear: this is no longer an architecture confined to deeply embedded controllers nobody talks about.
The automotive news was the significant part. Infineon committed to RISC-V for future automotive microcontroller families, and Quintauris — a joint effort by Bosch, Infineon, NXP and STMicroelectronics — showed an automotive braking control system built on RISC-V IP with safety-qualified toolchains. Nuclei Systems reported ASIL-D compliant cores licensed to major automotive customers and more than 300 licensees overall.
On the AI side, SiFive showed its X160 combining scalar, vector and matrix compute for TinyML workloads, Semidynamics demonstrated a unified scalar/vector/tensor NPU for edge inference, and Tenstorrent ran a small language model on embedded IP. Andes pointed at a shipping consumer product — the Amazfit T-Rex 3 Pro smartwatch, over a million units — as evidence the architecture is past the evaluation stage.
For anyone choosing a microcontroller today, the honest position is still that the Arm ecosystem is deeper, better documented and easier to hire for. What has changed is the risk calculation on the other side: RISC-V is no longer a bet that the tooling will eventually arrive.
Source: RISC-V International